The power consumption of the transistor technology, to challenge the plan faces bottleneck
Datum:2011-08-19 14:46
so as to use design size more small device to reduce the power consumption of the static and cost.
From the system level level, the spirit of the attention of the best integration and also have the very good results. For example, in a single FPGA to highly integrated DuoGe division components can dramatically reduce system I/O, and significantly reduce the amount of power consumption. In addition, in the distance in the rf head DPD advanced algorithm can also make a telecommunications equipmen
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